During the fabrication of silicon wafers used in the manufacture of semiconductor devices and circuits, as the various layers are etched into patterns, the surface of the wafer becomes one of high and low plateaus with the plateaus being delineated by steps. The deposition of certain materials (e.g., oxides, nitrides, metals, polysilicon) over these steps results in an uneven surface topography due to their tendency to conform to the topography over which they are deposited (i.e., conformal materials). However, a flat surface is normally required to allow accurate further fabrication. Therefore, this uneven surface must be planed before further fabrication steps can take place.
Although there are various planarization methods known, the only process that provides global planarization of an entire wafer is chemical-mechanical polishing (CMP) which is a combination of chemical etching and mechanical buffing. CMP processes render an uneven surface topography planar by typically removing between 500 and 20,000 .ANG. from the surface of the fabricated wafer. However, the CMP process must be accomplished without contaminating or scratching the surface of the fabricated wafer and without polishing away portions of materials already laid down.
One solution to the problem of planarization is to apply a material over the surface of the fabricated wafer to serve as an etch mask to protect the underlying layers during CMP processing. Etch mask materials exhibit low viscosity and are applied to the fabricated wafer by a spinning technique. This combination of low viscosity and application by spinning results in the etch mask material filling in the gaps and voids created by the steps and thereby forming a planar surface. After any necessary curing or other treatment of the etch mask material, the wafer is then subjected to CMP processing. The CMP processing of a fabricated wafer which has been coated with an etch mask material can be envisioned as occurring in two distinct stages. The first stage is the removal of the etch mask material down to the top of the highest peaks of the last layer to be applied to the fabricated wafer (e.g., a conformal layer). The second stage is the simultaneous removal of portions of these peaks and portions of etch mask material. If the etch mask material etches at a uniform rate throughout its thickness, the resulting surface after the first stage of CMP processing is planar. And if the etch mask material etches at substantially the same rate as that of the last layer to be deposited on the wafer, the resulting surface after the second stage of CMP processing will also be planar and therefore suitable for further fabrication. However, if the etch mask material does not etch at a uniform rate throughout its thickness and/or if the etch mask material does not etch at substantially the same rate as that of the last layer to be deposited on the wafer, then the resulting surface after the second stage of CMP processing will not be planar. Therefore, in order to render an uneven surface of a substrate planar with CMP processing, it is necessary 1) that the etch mask material etch uniformly throughout its thickness and 2) that the etch mask material etch at substantially the same rate as that of the last layer to be applied to the fabricated wafer.
These two criteria are difficult to obtain using conventional etch masking materials and CMP processes and prior to the present invention, achieving these criteria required the use of exotic etch masking materials and/or uncommon CMP processes. Typical etch masking materials etch at uncontrollable rates. For example, typical photoresists, if uncured, can etch at uncontrollable rates of approximately 1000 .ANG. per second, thereby making it essentially impossible to achieve the control necessary to render the surface planar.
Curing the etch mask material prior to CMP processing will slow the etch rate of the material. However, most common methods of curing do not result in uniform curing throughout the thickness of the etch mask material and therefore result in nonuniform etch rates. This is because the chemical and mechanical property limits of the etch mask material are often exceeded before sufficient curing is achieved. However, it is known that electron beam radiation can be distributed uniformly throughout certain materials which are suitable for use as etch mask materials. This uniformity insures that the etch rate is uniform throughout the film thickness. In addition, electron beam radiation is known to stabilize photoresists, which may also be used as etch mask materials, thereby rendering them resistant to plasma etching during patterning processes on a silicon wafer. Stabilization of photoresists during patterning by electron beam radiation is used in order to maintain critical dimensions already on the wafer during the patterning process. Matthew F. Ross, David Comfort and George Gorin, "Plasma Etch Characteristics of Electron Beam Processed Photoresist", paper presented at SPIE Microlithography 1995 Conference, W. R. Livesay, "Vertical Lithography-controlling resist profiles in optical lithography with a large area electron beam", paper presented at the SPIE Microlithography 1994 Conference; W. R. Livesay, A. L. Rubiales, M. Ross, S. Woods, S. Campbell, "Electron beam hardening of photoresist", paper presented at SPIE Microlithography 1993 Conference. In addition, it is known that when certain Spin-On Glass materials (SOG), which are also suitable for use as etch mask materials, are treated with electron beam radiation, there is a decrease in etch rate which corresponds to an increase in electron beam dose. Electron Vision Technical Bulletin, Jun. 16, 1994 entitled "Electron Beam Processing of AlliedSignal Accuglass 211 SOG". However, prior to the present invention, electron beam radiation has not been used to control or tailor the etch rate of etch mask materials in order to plane the surface of as silicon wafer.
Therefore, there remains a need for a method of rendering an uneven surface topography of a fabricated wafer planar which 1) does not result in the scratching or contamination of the surface of a fabricated wafer; 2) does not polish away portions of materials already laid down; and 3) which utilizes typical etch masking materials and CMP processes.